.. v_addition documentation master file, created by
   sphinx-quickstart on Mon Apr 29 09:42:45 2024.
   You can adapt this file completely to your liking, but it should at least
   contain the root `toctree` directive.

Verilog HDL课程补充
======================================

.. toctree::
   :maxdepth: 2
   :caption: 目录:
   
   本地仿真环境搭建
   VCS仿真框架搭建
   静态时序分析与门级仿真
   DPI-C机制